PCI pinout

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This information has been cloned from wikipedia

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Connector pinout

The PCI connector is defined as having 62 contacts on each side of the edge connector, but two or four of them are replaced by key notches, so a card has 60 or 58 contacts on each side. Pin 1 is closest to the backplate. B and A sides are as follows, looking down into the motherboard connector.

32-bit PCI connector pinout
Pin Side B Side A Comments
1 −12V TRST# JTAG port pins (optional)
2 TCK +12V
3 Ground TMS
5 +5V +5V
6 +5V INTA# Interrupt lines (open-drain)
8 INTD# +5V
9 PRSNT1# Reserved Pulled low to indicate 7.5 or 25 W power required
10 Reserved IOPWR +5V or +3.3V
11 PRSNT2# Reserved Pulled low to indicate 7.5 or 15 W power required
12 Ground Ground Key notch for 3.3V-capable cards
13 Ground Ground
14 Reserved 3.3Vaux Standby power (optional)
15 Ground RST# Bus reset
16 CLK IOPWR 33/66 MHz clock
17 Ground GNT# Bus grant from motherboard to card
18 REQ# Ground Bus request from card to motherboard
19 IOPWR PME# Power management event (optional) 3.3V, open drain, active low.<ref>PCI Power

Management Interface Specification v1.2</ref>

20 AD[31] AD[30] Address/data bus (upper half)
21 AD[29] +3.3V
22 Ground AD[28]
23 AD[27] AD[26]
24 AD[25] Ground
25 +3.3V AD[24]
26 C/BE[3]# IDSEL
27 AD[23] +3.3V
28 Ground AD[22]
29 AD[21] AD[20]
30 AD[19] Ground
31 +3.3V AD[18]
32 AD[17] AD[16]
33 C/BE[2]# +3.3V
34 Ground FRAME# Bus transfer in progress
35 IRDY# Ground Initiator ready
36 +3.3V TRDY# Target ready
37 DEVSEL# Ground Target selected
38 Ground STOP# Target requests halt
39 LOCK# +3.3V Locked transaction
40 PERR# SMBCLK SDONE Parity error; SMBus clock or Snoop done (obsolete)
41 +3.3V SMBDAT SBO# SMBus data or Snoop backoff (obsolete)
42 SERR# Ground System error
43 +3.3V PAR Even parity over AD[31:00] and C/BE[3:0]#
44 C/BE[1]# AD[15] Address/data bus (lower half)
45 AD[14] +3.3V
46 Ground AD[13]
47 AD[12] AD[11]
48 AD[10] Ground
49 M66EN Ground AD[09]
50 Ground Ground Key notch for 5V-capable cards
51 Ground Ground
52 AD[08] C/BE[0]# Address/data bus (lower half)
53 AD[07] +3.3V
54 +3.3V AD[06]
55 AD[05] AD[04]
56 AD[03] Ground
57 Ground AD[02]
58 AD[01] AD[00]
60 ACK64# REQ64# For 64-bit extension; no connect for 32-bit devices.
61 +5V +5V
62 +5V +5V

64-bit PCI extends this by an additional 32 contacts on each side which provide AD[63:32], C/BE[7:4]#, the PAR64 parity signal, and a number of power and ground pins.

Ground pin Zero volt reference
Power pin Supplies power to the PCI card
Output pin Driven by the PCI card, received by the motherboard
Initiator output Driven by the master/initiator, received by the target
I/O signal May be driven by initiator or target, depending on operation
Target output Driven by the target, received by the initiator/master
Input Driven by the motherboard, received by the PCI card
Open drain May be pulled low and/or sensed by multiple cards
Reserved Not presently used, do not connect

Most lines are connected to each slot in parallel. The exceptions are:

  • Each slot has its own REQ# output to, and GNT# input from the motherboard arbiter.
  • Each slot has its own IDSEL line, usually connected to a specific AD line.
  • TDO is daisy-chained to the following slot's TDI. Cards without JTAG support must connect TDI to TDO so as not to break the chain.
  • PRSNT1# and PRSNT2# for each slot have their own pull-up resistors on the motherboard. The motherboard may (but does not have to) sense these pins to determine the presence of PCI cards and their power requirements.
  • REQ64# and ACK64# are individually pulled up on 32-bit only slots.
  • The interrupt lines INTA# through INTD# are connected to all slots in different orders. (INTA# on one slot is INTB# on the next and INTC# on the one after that.)


  • IOPWR is +3.3V or +5V, depending on the backplane. The slots also have a ridge in one of two places which prevents insertion of cards that do not have the corresponding key notch, indicating support for that voltage standard. Universal cards have both key notches and use IOPWR to determine their I/O signal levels.
  • The PCI SIG strongly encourages 3.3 V PCI signaling, requiring support for it since standard revision 2.3, but most PC motherboards use the 5 V variant. Thus, while many currently available PCI cards support both, and have two key notches to indicate that, there are still a large number of 5 V-only cards on the market.
  • The M66EN pin is an additional ground on 5V PCI busses found in most PC motherboards. Cards and motherboards that do not support 66 MHz operation also ground this pin. If all participants support 66 MHz operation, a pull-up resistor on the motherboard raises this signal high and 66 MHz operation is enabled.
  • At least one of PRSNT1# and PRSNT2# must be grounded by the card. The combination chosen indicates the total power requirements of the card (25 W, 15 W, or 7.5 W).
  • SBO# and SDONE are signals from a cache controller to the current target. They are not initiator outputs, but are colored that way because they are target inputs.
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