Makefile simple
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It will just build all of the <code>*.c</code> files in this directory into their own object files, and then output a linked binary to <code>BINOUT</code> | It will just build all of the <code>*.c</code> files in this directory into their own object files, and then output a linked binary to <code>BINOUT</code> | ||
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| + | There is no tidy housekeeping / folder creating in this makefile | ||
<source lang="text"> | <source lang="text"> | ||
Revision as of 10:59, 1 March 2012
This is a really simple makefile, for small projects
It will just build all of the *.c files in this directory into their own object files, and then output a linked binary to BINOUT
There is no tidy housekeeping / folder creating in this makefile
# the output binary name BINOUT?=main # a cross compile prefix (if you want one) CROSS_COMPILE?= # standard cflags CFLAGS:=-Wall -pedantic # standard lflags LFLAGS:= # a list of libraries you wish to link against LIBS:= #-------------------------------# SRCS:=$(wildcard *.c) DEPS:=$(SRCS:.c=.d) OBJS:=$(SRCS:.c=.o) LFLAGS+=$(addprefix -l,$(CLIBS)) GCC:=$(CROSS_COMPILE)gcc MAKE+=--no-print-directory .PHONY: all run clean new all: $(BINOUT) run: all ./$(BINOUT) clean: rm -f $(DEPS) $(OBJS) $(BINOUT) new: clean @$(MAKE) all $(BINOUT): $(OBJS) $(GCC) $(LFLAGS) $(filter %.o,$^) -o $@ $(OBJS): %.o: %.c %.d $(GCC) $(CFLAGS) $*.c -c -o $@ $(DEPS): %.d: %.c makefile $(GCC) $(CFLAGS) -MM $*.c -o $@ include $(wildcard *.d)
